15 hours

Senior IC Design Engineer

San Jose, CA
  • Job Code
Job Title: Senior IC Design Engineer 155016

Primary Location United States-California-San Jose
Job: Design Engineering
Schedule: Full-time

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI). 

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!


We are looking for a seasoned design engineer Xilinx’s next generation high-speed memory PHY design within the IO, Clocking and Memory Sub-system group. The role requires architecting, design, and implementation of High-Bandwidth-Memory (HBM) interfaces for our next gen external memory solutions.
  • Digital design from micro-architecture development through to physical implementation and silicon validation
  • DDR and High-Speed PHY Design
  • Design Expertise in DDR4, LPDDR4, and/or HBM PHY and sub-system design
  • Work cross functionally with various groups from Marketing to Backend implementation and packaging to define the product and successfully implement #jm



  • Master’s Degree in Electrical Engineering
  • 5 years experience in ASIC Design, front-end RTL coding, complex state machine design
  • Demonstrative expertise in all phases of digital design techniques from micro-architecture development through to physical implementation
  • Experience with synthesis, STA, DFT, and standard ASIC design tools/flows
  • High-speed DDR PHYs such as DDR3/4 or LPDDR3/4 a plus
  • HBM experience is a plus


Job Posting: Mar 15, 2018, 11:14:12 AM

Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status, gender Identity or sexual orientation. The self-identification information requested is not gathered for employment decisions. It is used only for compliance with US Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.


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Senior IC Design Engineer

San Jose, CA

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San Jose, CA

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