10 hours
2018-04-262018-05-26

Senior CAD Engineer.

Xilinx
San Jose, CA
  • Job Code
    154930
Job Title: Senior CAD Engineer. 154930

Primary Location United States-California-San Jose
Job: CAD/Layout
Schedule: Full-time
Description
Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs and 3DICs. Xilinx's all-programmable devices are designed into tens of thousands of products that improve the quality of the everyday lives of billions of people worldwide. For over 30 years, Xilinx has been behind some of the greatest advancements in technology and science - from the industry's first fabless semiconductor model to the NASA Curiosity Mars Rover, to today's autonomous vehicles and hyperscale data centers. Xilinx uniquely enables applications that are both software-defined, yet hardware optimized - enabling smart, connected and differentiated applications across technology's biggest megatrends, including Machine Learning, 5G Wireless, Embedded Vision, Industrial IoT and Cloud Computing and more.

If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative, and creative people to help deliver groundbreaking technologies that enable our customers to differentiate. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.

 

Job Description:

 

 

Xilinx is looking for a person to join their Standard Cell Library Support and Development to help them define and develop innovative methodologies and flows to more efficiently create libraries in state of the art processes. As part of the library team, you will have the chance to participate in all aspects of the library development, from inception, to creation, validation/ QA and release. #ey

 

 

 



Qualifications

 

The applicant should have also be able to meet the following qualifications:

 

 

  • Demonstrates having a solid technical understanding and knowledge of library/ development and QA flows in advanced process technologies, with having experience in the entire library design flow being a plus
  • Have experience using the latest IC CAD tools from the various EDA companies for IP development (Have experience in tools such as Virtuoso, Primetime, Design Compiler, VCS/ NCVerilog, Conformal,  etc… is a plus)
  • Demonstrates a good understanding in revision control systems and CAD infrastructure
  • Ability to work in a team orientated environment and can coordinate / resolve and manages issues with design teams
  • Is able to define an evaluation/ qualification plan and complete such plan for new tools, cells, and/or solutions
  • Is able to study a problem independently, and work with counterparts to come up with a requirements specification or resolution plan
  • God programming and scripting skills in Python, Tcl, Skill and/or Perl
  • Excellent written and verbal social skills.
  • Demonstrates ability to write an implementation specification for basic flows and methodologies, PDK or physical / electrical verification problems Is able to clearly articulate the concepts behind a particular flow for designers

 

Qualifications:

 

  • A MSEE is preferred w/ 4 years of practical experience, or a BSEE w/ 6 years of practical experience in performing similar responsibilities.

 


Job Posting: Mar 13, 2018, 11:08:58 PM

Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status, gender Identity or sexual orientation. The self-identification information requested is not gathered for employment decisions. It is used only for compliance with US Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.

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Senior CAD Engineer.

Xilinx
San Jose, CA

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San Jose, CA

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